1. Field of Technology
The present invention relates to an AGC (automatic gain control) circuit and to an optical data receiving apparatus and an optical data transmission system which incorporate such an AGC circuit.
2. Description of Prior Art
FIG. 21 is a block diagram of a prior art AGC circuit, formed of a gain adjustment section 101, an amplitude detection section 102, and a gain control section 103. The amplitude detection section 102 detects the amplitude of the input signal, gain control section 103 generates an amplifier control signal in accordance with the detected value, and the gain adjustment section performs control in accordance with the control signal, for converting the input signal which varies in amplitude to an output signal having fixed amplitude.
Another example of such a prior art type of AGC circuit for holding the amplitude of an output signal at a fixed value is disclosed in Japanese patent HEI 9-246887. In that case, the peak value of the output signal is detected, and a gain control signal is thereby generated by an external gain control circuit, with feedback of that gain control signal being applied to the AGC amplifier, for thereby holding the output signal amplitude from that amplifier to a fixed value.
However with the prior art AGC circuit of FIG. 21, when there is a large-amplitude input signal, the gain control section 101 may become unable to apply sufficient adjustment of gain, so that the amplitude of the output signal from the AGC circuit may vary. Furthermore with the AGC circuit of Japanese patent HEI 9-246887, the gain adjustment section within the AGC amplifier includes a number of FETs connected vertically (i.e., in series between a power supply voltage and ground potential), so that the overall circuit scale is large, and a substantially high value of power supply voltage becomes necessary.
It is an objective of the present invention to overcome the disadvantages of the prior art set out above, by providing an AGC circuit whereby the circuit configuration of an amplitude adjustment section can be simplified, and the power supply voltage requirements can be accordingly lowered, and whereby output signal A can be controlled to a substantially fixed amplitude value irrespective of variations in amplitude of input signals.
It is a further objective to provide an optical data receiving apparatus and an optical data transmission system which incorporate such an AGC circuit.
To achieve the above objectives, the invention provides an AGC circuit which operates on a pair of first and second input signals, having a gain-controlled amplifier which includes at least one differential amplification adjustment circuit section for amplifying the first and second input signals to produce complementary first and second controlled output signals having a controlled amplitude, a peak detector for detecting a peak value of at least one of the first and second controlled output signals, a DC monitoring circuit for measuring a value of a DC component of at least one of the first and second controlled output signals, and an amplitude fixing control circuit for deriving a value of voltage difference between the peak value and the DC component, and for generating an amplitude control signal based on comparing the voltage difference with an externally supplied reference voltage. The differential amplification adjustment circuit section applies a degree of amplification that is determined by the amplitude control signal, to thereby hold the amplitudes of the controlled output signals at a fixed value which is determined by the reference voltage.
More specifically, according to a first aspect, the peak detector derives a peak value of amplitude of a first one of the controlled output signal, and the DC component monitoring circuit derives a value of a DC component of that first controlled output signal, while the amplitude fixing control circuit derives a difference between the peak amplitude value and the DC component value and compares the difference with the amplitude control reference voltage, to obtain the amplitude control signal based on a result of the comparison.
The differential amplification adjustment circuit section includes a pair of FETs connected as a differential pair which amplify the input signals, having respective load resistors across which two differential signals are developed, and a pair of current source FETs connected in parallel with respective ones of the load resistors and having each of their gate electrodes coupled to receive the amplitude control signal. These current source FETs thereby adjust respective values of current flow in the load resistors in accordance with the amplitude control signal to thereby control respective amplitudes of the first and second controlled output signals.
Alternatively, a current source FET which is connected to respective source electrode of the differential pair of FETs has its gate electrode coupled to receive the amplitude control signal, to thereby adjust respective values of current flow in the load resistors of the differential FET pair in accordance with the amplitude control signal, and so control respective amplitudes of the first and second controlled output signals.
The gain-controlled amplifier may be configured with a plurality of differential amplifier circuit sections connected in cascade, for amplifying the first and second input signals of the AGC circuit to produce the complementary first and second output signals from a final stage, and a differential amplification adjustment circuit section which operates on these output signals, under the control of the amplitude control signal, for thereby producing the controlled output signals of the AGC circuit.
Alternatively, the amplifier circuit can be configured with a plurality of differential amplification adjustment circuit sections connected in cascade, for amplifying the first and second input signals of the AGC circuit and producing the complementary first and second controlled output signals of the AGC circuit from a final stage, with each of the differential amplification adjustment circuit sections being controlled by the amplitude control signal. In that case, a large dynamic range of input signal values can be handled, while maintaining a high degree of precision of control of amplitude of the output signals produced from the AGC circuit.
According to a second embodiment of the invention, amplitude control is applied directly to both of the controlled output signals of the AGC circuit. Specifically, the AGC circuit includes first and second peak detector circuits for peak detection of the first and second controlled output signals respectively, and first and second DC component monitoring circuits for deriving respective values of DC component of the first and second controlled output signals. In that case, the amplitude fixing control circuit derives the difference between the DC component of the first controlled output signal and the peak amplitude value of the first controlled output signal, and compares that difference with the amplitude control reference voltage to obtain a first amplitude control signal, and derives the difference between the DC component of the second controlled output signal and the peak amplitude value of the second controlled output signal, and comparing that second difference with the amplitude control reference voltage to obtain a second amplitude control signal. The first and second amplitude control signals are used in the differential amplification adjustment circuit to control the respective amplitudes of the two controlled output signals mutually independently.
According to a third embodiment of the invention, the amplifier circuit is configured for directly controlling the amplitude of a specific one of the pair of controlled output signals based on a single amplitude control signal, as described above, however in addition the AGC circuit includes a voltage control circuit coupled between the DC component monitoring circuit and the differential amplification adjustment circuit section, for comparing the DC component (i.e., value of DC level) of that specific one of the two controlled output signals with a second reference voltage, and generating a DC component control voltage in accordance with a result of the comparison. The differential amplification adjustment circuit is configured to adjust the DC component of each the controlled output signals in accordance with the DC component control voltage.
The differential amplification adjustment circuit section can be configured such that the DC component control voltage constitutes a variable power supply voltage, which is supplied to a common connection point of the load resistors of the differential FET pair and the drain electrodes of the aforementioned pair of current source FETs that are connected respectively in parallel with these load resistors.
Alternatively, the differential amplification adjustment circuit section can be configured with a parallel combination of a third current source FET and a third resistor, which are connected between a power supply voltage and the aforementioned common connection point. In that case, the DC component control voltage constitutes a control signal which is applied to the gate electrode of the third current source FET, for thereby controllably bypassing the current which flows through the third resistor, and thereby adjusting the actual power supply voltage which is applied to the common connection point.
In either case, the respective DC levels of the output signals from the differential FET pair (and hence of the pair of controlled output signals which are produced from the AGC circuit) are adjusted together by the DC component control voltage.
According to a fourth embodiment, the DC levels of the controlled output signals from the AGC circuit are detected respectively separately, and respective first and second DC level detection signals are supplied to the voltage control circuit. In that case, the voltage control circuit produces corresponding first and second DC component control voltages. These can be applied as respective supply voltages to the two load resistors of the differential FET pair, or may be applied as respective control signals to a first parallel combination of a current source FET and a resistor, which control the level of supply voltage applied to the first load resistor of the differential FET pair, and to a second such parallel combination, which controls the level of supply voltage applied to the second load resistor of the differential FET pair.
In either case, the respective DC levels of the output signals from the differential FET pair (and hence of the pair of controlled output signals produced from the AGC circuit) are adjusted mutually independently, by the first and second DC component control voltages.